New VirEnce MCPCB for E17/E21/119/144/233U

Found this mother next to the board.




FYI: the boards have arrived. Will check it tomorrow in the custom office. :slight_smile:

- Clemence

Testing with 2S2P so… 6 volts’ish in?

Correct Matt
Please check the pictures in below link. I added some configurations diagram there
https://www.virence.com/blank-rwrlr/vr16sp4

- Clemence

If I am looking at the pics correctly, for a 3V setup one needs 2+ and 2- wires?

Unfortunately yes. No space left on this tiny board to create jumper pads without compromising optic’s base or safe side margin.
I’ll make add on secondary jumper board for use on top of it in the near future.

- Clemence

Cool pics! Is that some species of paper wasp?

I think so Looks like its a digger wasp (Sceliphrinae). She didn’t care about anything but her egg safety. Filled two of the M3 screw threads on my testing block.

- Clemence.

Specification:
Changes are highlighted in bold

VR16S1

- MCPCB thickness: 1,65mm ±0,1mm

- Dielectric thickness: 10µm ±3µm

- Dielectric thermal conductivity: 7,5W/MK

- Copper trace: 70µm

- Solder mask thickness: 15µm ±5µm
- Anode - cathode gap: adjustable from 0,5mm down to 0,2mm (was 0,5mm to 0,3mm) by scraping off the masking
- Brighter reflective white solder mask
- Tougher solder mask (untested): prevent yellowing in sustained leadfree 260C environment.
- Copper pads plating: OSP (was ENIG) to get every last bit of thermal performance
- Flat section for V-scoring 15mm maximum (was fully round): mass production consequence

  • Routed MCPCB’s outline, not punched to get the flattest possible bottom.

VR16SP4

- MCPCB thickness: 1,65mm ±0,1mm

- Dielectric thickness: 10µm ±3µm

- Dielectric thermal conductivity: 7,5W/MK
- Copper trace: 35µm (was 70µm) for better reflow process

- Solder mask thickness: 15µm ±5µm
- Anode - cathode gap: 0,2mm (was 0,3mm)
- Final quadtrix footprint: slightly adjustable from 4,4 x 4,4mm to 4,6mm x 4,6mm (was 4,2 x 4,2mm to 4,4 x 4,4mm).
- Brighter reflective white solder mask
- Tougher solder mask (untested): prevent yellowing in sustained leadfree 260C environment.
- Copper pads plating: OSP (was ENIG) to get every last bit of thermal performance
- Flat section for V-scoring 15mm maximum (was fully round): mass production consequence

  • Routed MCPCB’s outline, not punched to get the flattest possible bottom.

- Clemence

Clemence, how hard would be to install vr16s1 with 144 in KF8 ? Seems like perfect host for that combination, except mcpcb size is 20 instead of 16…

You can always run a 16mm PCB in a 20mm spot with no problems. The light should have a centering ring for the reflector and emitter that will ensure the MCPCB is held in the correct spot.

However, jf there is no clamping pressure from the reflector to hold the MCPCB to the host, and instead the host relied on screws to hold the MCPCB down, it is likely you can just use washers on the existing screws to clamp the MCPCB.

Unable to checkout by PayPal?

Order No. 10131

Could be your ends. Looks like anyone could do it without problem. Try to clear your cookies and cache first.

- Clemence

again

EDIT:
It may be a problem with my VISA card.

Great news!
The VR16SP4 alpha board test was a success! Although the test could not be completed due to inadequate power supply, the result was already very near it’s peak.

Reflow preparations:
Magnifier application and phone stand is invaluable when working with E21A

Dropping the solder paste. I’m done trying leadfree with E21A. Pb63Sn37 is the best.

Carefully even out the drops to match the pads and then placing the LED, try not to smear the applied paste too much. In this picture I dropped the LED too far away from the target.

Fine tip angled tweezer works best for me. Next to the ceramic tweezer is the press to open tweezer. You’ll need to decrease the tension if you want to use PTO tweezer, E21A’s sides are very soft/fragile.

Ready to go to my “deluxe” gas kitchen stove reflow oven… The final positions will be adjusted later, I tap each LED tried not to move them sideways to make sure the flux wet all pads evenly.

Done, cleaned thouroughly with IPA and toothbrush. Ready for the test

PSU, DMM, Lux meter, Digital thermometer + probe, Test block, big heat pipe fanned cooler, and notepad. Where’s Wally?

I found the heat sink in the last minute, it wasn’t screwed, just sat on top the block using my trusty Moly-graphite bearing grease. It was too late to drill and tap mounting threads, perhaps later.

THE RESULT

New record breaking!! 11,2A at whooping 35,6 watt for such tiny LEDs

The test ended prematurely because my PSU can only supply up to 48 watts. But the curve is already near it’s peak (I predict it should be around 12A). Single E21A can be driven up to 3,1A using my VR16S1 proto board. We assumed 4xE21A in 4P should be able to up to 12A, correct? But when they cramped together in gapless VR16SP4 proto board in earlier test, max current was only 4,8A. Stopped prematurely by the photon cross talks (burnt phosphor’s layer). Now without the photons heating the phosphor layers, the new board can unleash each E21A to their maximum.

Start test block temp was 27,3C, test ended with block temp at 35.3C. I held them at 11,2A for more than 5 minutes while texting and sending pictures to Jensen567. The lux, temperature, and voltage reading stayed the same! Here’s the after test picture, no visible damage, like new. The chipped phosphors caused by the ceramic tweezer when I positioned them in the oven.

Just an Idea to extract more lumens:
If we pot it with something like this 10mm spherical glass lens using optical silicone, more photons can be extracted while making the LEDs cooler.

Looks familiar?

Going for a deep sleep now.

  • Clemence

Amazing work Clemence. I dont understand it all but appreciate the effort put in. :beer:

You’re welcome MR. Steve :student:

Nice test! So how does Cree manage to cram the dies so close together in the XHP35, XHP50.2 and XHP70.2?

Until someone test the BLF absolute max limit, I predict the limit for quadtrix E21A on VR16SP4 is as follow:
BLF absolute limits:

- 12A in 4p (3V)

- 6A in 2s2p (6V)

  • 3A in 2s+2p/4s(9V/12V)

BLF limits (80%), for sustainable extended output:

- 9,6A in 4p (3V)

- 4,8A in 2s2p (6V)

  • 2,4A in 2s+2p/4s(9V/12V)

Nichia absolute limits (to get the min 60.000 hours L70):

- 5,6A in 4p (3V)

- 2,8A in 2s2p (6V)

  • 1,4A in 2s+2p/4s(9V/12V)

- Clemence

The same thing goes for closely packed 144A dies. With single uniform phosphors and silicone layer on top the dies, the photons cross talks is not there. Each time the photon crossing the silicone/air boundary some of it will be reflected back inside, adding more heat. In separated dies like the this quadtrix, adjacent exited photons get absorbed by the nearest walls, adding even more heat.
This is why Nichia uses some kind of reflective wall (soft white silicone) surrounding the E17A/E21A dies - to minimize photon cross talks (so they can cram more E17A/E21A in smaller LES). Without this barrier, we’ll need much larger space.
The barrier also what makes tint shift (from high angle emission, like those found in 144A and XPG3) is minimal with E series

- Clemence

With proper 0,2mm gap E21A centers easily on VR16S1.