I took a quick look at https://www.vishay.com/docs/62860/si7157dp.pdf and seems like a sensible choice, for a Pfet. Good Rds(on) when the gate is driven sufficiently.
However the threshold voltage needed is on the knee of the curve, it doesn’t start turning on fully until 3V or so (at 25C). And as it gets hotter it needs more volts, at least 4V at max Tj (125C). Typically (not absolute max.etc)
See page 4 of the .pdf, graph “On-Resistance vs. Gate-to-Source Voltage”.
If you are using a Schottky for reverse polarity protection, and knowing that the MCU may not drive fully to the rails, with cell voltage below maybe three and a bit volts you might not be driving it hard into saturation.
This is the difficulty with Pfets, they rely on holes for conduction rather than electrons, and the physics is rather different. Much easier to make a logic-level Nfet than a Pfet.
Also Pfets tend to have higher gate capacitance, making PWMing them at high frequencies a bit trickier. If the gate drive isn’t strong enough (e.g. just an MCU pin) they can spend a lot of time in linear mode during the transitions (i.e. getting hot).
Just something to look out for when evaluating. I think it should work well in this application.