Loneoceans post explains it well, basically it does this :
Plus probably through the logic circuits as well.
Since we need to protect the power path we need a power mosfet. High side PFET is the easy way,here the SISS61DN has max DC current of 20A and max Rdson of ~5mΩ at the voltage we’re driving it, with 15A in still means a voltage across it (Vds) of 75mV and 1.125W of power lost.
We can also use a low side NFET which have better characteristics than PFETs, but this means that the circuit GND and batt- are different, the layout is bit less simple, it’s quite practical to have a GND/batt ring around the circuit, some drivers use a NFET, I saw pics of an Armytek driver and they used one.
Or we can use a high side NFET with an ideal diode controler (a gate driver with a charge pump) but that’s more components.
It looks slightly better indeed, good find.
Those are interesting links but they don’t contradict what I said.
You seem to be confused about what Vds means since you want it at 3~4V (battery voltage ?)
The drain source voltage is the voltage across the mosfet. It is that high when the mosfet is off (very high resistance) and the rest of the circuit is at 0V. But when we drive it below Vgs=–2.8V the resistance drops very low, below 5mΩ, it’s like a resistor and the voltage across this resistor is our Vds.
If we’re drawing 10A then Vds will be 0.005 x 10 = 50mV. This is simply ohm’s law and this is what the Rdson limit line is.
At some point though we hit the thermal stability limit for DC, which for SISS61DN is 20A, same for 63DN.
What is the rest of the diagram for then ? Linear mode, that is when when have a higher Vds due to a higher Rdson.
An example is a linear led driver, when we want to drive an LED at 5A with a 3.2Vf and a battery voltage of 4.2V, then Vds = 1v (4.2-3.2V) and Rdson = 0.2Ω. In that case it would not be in the SOA of the 61DN and it would blow.
Now imagine drawing 10A with a Vds of 4V, that’s 40W in the mosftet, of course it’s going to blow!