or OSHPark shows one thing but for some reason the fab house runs em differently
(like what happened to Werner)
I have uploaded a few .brd files I found in peoples shared project folders, OSHPark rendered them all funky, traces extra wide and shorting. blah blah…when I converted to gerbers, they came out just as I uploaded them…sometimes their stuff goes squiffy…not often but it happens
The fab makes occasional errors whether you use brd or gerbers. I’ve had equal fab errors with both.
I’ve noticed that too. Honestly, if you run drc on the boards, you’ll see the problems causing it. You can only have so many drc violations before you start getting problems. Gerbers mush everything together and can hide some errors. When starting out I can understand ignoring everything to just to get a simple pcb made before you really learn eagle. But it works against you, makes designs harder if you continue like that.
I dunno about all that. Generating Gerbers is definitely the tried and true way. Even Gerbers leave room for error, BRD files leave a lot of room for error.
As long as one isn’t using gerbers because oshpark is refusing the brd due to a ton of design errors. Most fabs don’t even accept brds, its supposed to be helpful that oshpark does. The brd isn’t sent to the fab, they generate gerbers with eagle 6.6.
I got answer from oshpark and its like wight has said it before, fab messed it up, their files look good. No big problem anyway but good to know it wasn’t my fault.
I used gerberfiles before for itead but I like how easy it is to just upload the brd file and see a preview…
Get a program called grbv and it will generate a 3D image of your board as well, you can even change the default skin to the oshpark one and see the way your design will look as well
Like RMM’s Moonlight Special V2 8x 7135
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P.S. RMM when you zip the files, don’t include the revisions in the zip…only the files with capitol letter extensions
The Zener will dump excess voltage beyond their breakdown voltage (normal diodes typically only conduct forward). If you put 5v on the “side with a line” of a 4.3v Zener it will attempt to dump 0.7v. Assuming you have a strong 5v source, the Zener will promptly self-destruct. Thus we use a current limiting resistor between Vsupply and the Zener’s “side with a line”. The other side of the Zener connects to GND.
In order to get your 4.3v in this case you must connect whatever you want to power with 4.3v to GND and to the “line side” (Cathode) of the Zener, eg between the Zener and the limiting resistor. If you test between the other side of the limiting resistor and GND, you’ll find that remains at 5v (or whatever the input voltage is).
Many of you experienced Eagle gurus may already know this, but I've found Eagle's built in ULP "cmd-draw" to be especially useful. It can draw wires, polygons, move items into locations, or place vias in circular or even elliptical patterns. It will even name the vias for you, so you don't have to go around and name 12 vias "GND".
I was placing them manually before I found this, which requires forethought, attention to detail, math, and geometry. These are all things that I'm sure Wight loves to do, but I'm not very good at any of them!
This is definitely better than what I was doing. I knew that ULPs must already exist to help with things of this nature, but I didn’t go look for them. To my own detriment, apparently! Thanks for sharing RMM.
And don’t worry, there’s still plenty of math and geometry for me to do with the things this ULP does not cover. Triangles, for example, and various shapes intersecting one another…