Oshpark Projects

As long as one isn’t using gerbers because oshpark is refusing the brd due to a ton of design errors. Most fabs don’t even accept brds, its supposed to be helpful that oshpark does. The brd isn’t sent to the fab, they generate gerbers with eagle 6.6.

I got answer from oshpark and its like wight has said it before, fab messed it up, their files look good. No big problem anyway but good to know it wasn’t my fault.
I used gerberfiles before for itead but I like how easy it is to just upload the brd file and see a preview…

gerbers in a zip do the same thing

Get a program called grbv and it will generate a 3D image of your board as well, you can even change the default skin to the oshpark one and see the way your design will look as well

Like RMM’s Moonlight Special V2 8x 7135 :wink:

Top:

Bottom:

P.S. RMM when you zip the files, don’t include the revisions in the zip…only the files with capitol letter extensions :stuck_out_tongue:

OSH Park seems to have added a cart system.

Lol. Yeah, too many revisions...too little time!

I tried to run that 3D rendering program but I don't have OpenGL 3.0, so it was a no go.

How does that work? I see a second diode. Does that help the moonlight mode? Or is that the Zener I have read about?

Moonlight is pwm on a separate pin to only a single 7135.

The second diode marked "Z" is for an optional zener diode, for multi-cell use with multiple LEDs in series or an MT-G2.

Thanks Halo and RMM.
The circuit is hard to see in that sort of picture, but I did begin to see what the diode is for.

The Zener will dump excess voltage beyond their breakdown voltage (normal diodes typically only conduct forward). If you put 5v on the “side with a line” of a 4.3v Zener it will attempt to dump 0.7v. Assuming you have a strong 5v source, the Zener will promptly self-destruct. Thus we use a current limiting resistor between Vsupply and the Zener’s “side with a line”. The other side of the Zener connects to GND.

In order to get your 4.3v in this case you must connect whatever you want to power with 4.3v to GND and to the “line side” (Cathode) of the Zener, eg between the Zener and the limiting resistor. If you test between the other side of the limiting resistor and GND, you’ll find that remains at 5v (or whatever the input voltage is).

Skimming the pictures here may help:
http://www.evilmadscientist.com/2012/basics-introduction-to-zener-diodes/

Many of you experienced Eagle gurus may already know this, but I've found Eagle's built in ULP "cmd-draw" to be especially useful. It can draw wires, polygons, move items into locations, or place vias in circular or even elliptical patterns. It will even name the vias for you, so you don't have to go around and name 12 vias "GND".

I was placing them manually before I found this, which requires forethought, attention to detail, math, and geometry. These are all things that I'm sure Wight loves to do, but I'm not very good at any of them!

This is definitely better than what I was doing. I knew that ULPs must already exist to help with things of this nature, but I didn’t go look for them. To my own detriment, apparently! Thanks for sharing RMM.

And don’t worry, there’s still plenty of math and geometry for me to do with the things this ULP does not cover. Triangles, for example, and various shapes intersecting one another…

I think you may now remove the “untested” label RBD. :wink:

Doh! As if I read my own thread. :wink:

I added a few Oshpark PCBs I'm not ever going to use -- free for someone who will use them.

A few Knucklehead V3.0 boards, attiny13a programming boards, and 7135 test boards.

Here's a quick and dirty board for testing the Maxim MAX16820 Buck IC. 3 for $1.35. You could also use this to piggyback this IC onto another buck driver if you have enough space. If you do this, try and keep the DRV and CSN connections as short as possible.

OSH Park Link.

Thanks for this. Just saved me quite a lot of time!

Has anyone else had trouble with keeping all the vias assigned to the same NET? When I used this to do a circle of GND vias the other day only my first via was assigned to GND. Maybe I’m forgetting something.

Wight, are you talking about placing them manually or with the ULP?

With the ULP! For example, this will not result in anything other than the first via having a NAME of GND: