BLF17DD Info Thread - Reference

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RMM
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I would maybe take the attiny off and try some manual switching first with it powered up to make sure that it will indeed work.  If you need a pullup resistor 30K-100K should work fine.  

From the attiny13a datasheet:

 

In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC0x pins. Setting the COM0x[1:0] bits to two will produce a non-inverted PWM and an inverted PWM out- put can be generated by setting the COM0x[1:0] to three 

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Werner
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FmC wrote:

RMM wrote:

I think you could get away with a single FET for that build with a little creativity: use a small PFET to power the NFET gate directly from the 8V+ input.  It will load the attiny way less and will give the FET access to higher gate voltages, which will decrease the resistance of the FET.  You could also easily power more than one FET off the same attiny, if needed.  You would need to basically invert the PWM values, since the PFET turns on when the gate is pulled low.  

It is a crazy untested idea, but in theory it should work.  I don’t think you need a dedicated gate driver IC since we’re switching relatively slow. 

Richard,

I’ve built the driver today, but I’m having trouble getting modes to work. It’s stuck on full output.

I have tried pull-up resistors from 10k – 220k between the Source & Gate of the P Fet.

I also tried a 100 ohm pull down resistor on the big N Fet, between Gate & Ground.

 

I’m wondering if I have something wrong in the firmware;

When you say to invert the PWM values, do you just mean that Highest mode is “0” & Lowest (off) is “255” , or is there something else I need to change in the firmware as well?

 

Cheers.

What did you do exactly? Did you use the driver like in the schematic with two cells in series(8V)? I am asking because I don’t see a voltage reducing element like the Zener diode in the schematics and so you would grill the tiny.
——
Jist some info you maybe have missed:
standard firmware enables a pull down resistor for the output so that always if there is no high output the FETgate will be pulled down to GND to stop current from flowing.
The pfet will be standardized let current flow with the standard firmware in 0 mode because it gets connected to GND with the internal resistor.
On a mode 255 it should be pull the pgate to VcC so it should stop driving the nfet gate high but then you need a pulldown(additional hardware resistor(that what the the software pulldown is on standard drivers))

FmC
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RMM wrote:

I would maybe take the attiny off and try some manual switching first with it powered up to make sure that it will indeed work.  If you need a pullup resistor 30K-100K should work fine.

 I'll give that a shot tonight.

RMM wrote:

From the attiny13a datasheet:

 In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC0x pins. Setting the COM0x[1:0] bits to two will produce a non-inverted PWM and an inverted PWM out- put can be generated by setting the COM0x[1:0] to three 

I'm in the deep end here, & my Google floaties are barely keeping me above water...

Assuming the manual switching works, what would be the code to change the wave form?

Something along the lines of;  "#define  COM0x[1:1]" ?

------------

 

Werner wrote:
What did you do exactly? Did you use the driver like in the schematic with two cells in series(8V)?

It's a Zener modded driver.

Sorry, the schematic was just for me to get my head around how the P Fet fit into the circuit.

Werner wrote:
Jist some info you maybe have missed: standard firmware enables a pull down resistor for the output so that always if there is no high output the FETgate will be pulled down to GND to stop current from flowing. The pfet will be standardized let current flow with the standard firmware in 0 mode because it gets connected to GND with the internal resistor.

On a mode 255 it should be pull the pgate to VcC so it should stop driving the nfet gate high but then you need a pulldown(additional hardware resistor(that what the the software pulldown is on standard drivers))

So in addition to inverting the PWM signal, I need to put a pulldown on the NFet gate?

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Whatever was happening with the S6 I was putting together was burning up the MCU. I put a new one in the last driver I built and modes started working again. I’ve got a brand new triple XP-L dedoming, I’m hoping that this will be the last assembly.

FmC
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I'm getting nowhere trying to make this dual Fet combo work.

When I removed the 13A from the board & powered it up (hooked up to a test XHP70) it defaulted to full on. The only way I could get it to shut off was to pull the NFet gate to ground.

I tried a few combinations of resistors on the Fet gates, but couldn't get a result that put the Fets in an 'off' position permanently.

I was starting to look at other driver ideas, as I'm wasting too much time with this, when I realized that in one of OL's recent builds, he was using an SRK driver to power 3 XHP70's;

How is the SRK driver different from the 17/20mm FET drivers, & what makes it work in this situation, where the 17/20mm variants won't?

FmC
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I guess I asked the wrong question back in post#267; I was thinking that the NFet on the 17/20DD boards would not be able to power four XHP70's, which is why I asked about driving multiple Fets from the Attiny.

It was only when I started looking around for other driver options yesterday, that I saw that Justin had used an SRK Fet driver in his Triple XHP build (same components as the 17/20mm Fet drivers).

...So I'll go back to 'plan A' & just use a regular, Zener (or maybe LDO) modded Fet driver.

Thanks to the folks who have tried to help me out with the dual Fet idea, but I'm certainly not the guy to pull it off.

At least I have learned a little more about the circuits we are using here on the BLF DD drivers. Beer

 

 

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The triple XP-L S6 lives. Just goes to show, throw enough parts at a build and you can get it done even with problems. It measured over 3000 lumens at startup and about 2950 at 30 seconds. Modes work perfectly again after changing the MCU and using the new MCPCB and LED’s.

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