Sizes and Application Examples
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To fit this key, the vias need to have a distance of 1.3mm/1.5mm.
The actual Oshpark design rules (oshpark-2layer.dru) allow for a restring of 5mil and need a clearance of 6mil. So routing between the vias can be up to 12mil/20 mil.
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I find the 5mil restring too small (knowing that Oshpark has some margin of error for the drills) and prefer the older restring size of 7mil. That still leaves 8mil/16mil for wires.
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This is the pin layout from the programming side, which is not the side with the MCU, so it’s mirrored (the Attiny looked at from the bottom).
On small boards there is not enough space for full naming. On the right side of the picture the letters are size 0.6096mm (24mil), ratio 15%, this is about the smallest that Oshpark can handle to stay readable. So my naming scheme will be
O for MOSI
I for MISO
S for SCK
V or + for VCC
R for RESET
G or - for GROUND
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