What is our collective experience on OSH Park’s removing copper from the edges of the board? We are all aware that this is normally done. They require a 15mil setback for traces, but since our copper pours are not really traces it’s standard for us to specify copper right up to the edge of the board. Somewhere along the line a little copper is removed in order to prolong the life of the router bits used to cut the boards. How much are we talking about? I’ve just checked several boards using a feeler gauge and to me it looks like less than 0.2mm in all cases.
If you didn’t get your answer elsewhere already, the cap was moved due to a problem with voltage boosting upsetting the MCU. Comfychair, with help from other members, explored this pretty thoroughly in the FETs and gate resistors - scope images thread. Since the thread is now devoid of pics, here’s a link that shows the pics with the posts: Oops - looks like I’m having a connectivity issue right now so I can’t finish renaming this at the moment. For now you can go here and click on the link with a size next to it.
Exciting stuff on both counts. @pilotdog68 - looks like you’ve come a long way since realizing what vias were for! 
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