That seems to be a hole lot more mucking about just to avoid using a 22uF cap… Anyway, with some changes to the software I’m now getting consistently over 25 seconds of measurable off time with the 100uF cap, still reading ADC at 0.125 second intervals the whole time. So for now 10uF actually looks feasible. You would have to be pretty picky to notice enough lag on startup with 0.125 seconds intervals to be annoyed by it.
What is it you don’t want to wait for? With a 100uF cap and ADC detection at 2.2V I can not do a fast enough off press that doesn’t trigger the off time routine. Even if it’s because I’m too slow, lowering to a 22uF cap would take care of that, 10uF even more so.
I have a few more things to try, then the next step is to replace the 100uF cap with a 10uF cap and see what times I can get.
From what I read when this was talked about before, most of the drain in the OTSM cap came while the MCU was waiting for the voltage to drop on the voltage divider as C1 was discharging. If this is not the case then ignore that statement.
As far as using the ground trigger, it seems you were getting about twice the OTSM with this method vs ADC. If this has been improved or if we only need a cheap 22uf cap, then it may not be needed.
Basically use the trigger pin setup you started out with (not sure what to call it, basically on/off vs ADC).
Instead of the pin seeing V+ it would be connected to ground, just like we do with the e-switch (and it would work the same way basically, except it would turn the MCU off instead of leaving it active).
So this way if it saw the ground connection disconnected (aka, you turn the clicky switch off) it would instantly see this and turn off without having to wait for C1 to discharge through the voltage divider, allowing for a higher resistance voltage divider as well.
You would not have any high voltage worries since it is just ground and it should speed up the wake cycles since you would not have to wait for the ADC cycle to finish each wake (thus meaning it will be awake for at least 13 cycles to get a reading).
Also, since we have more pins to play with, we could setup separate pins for the e-switch and clicky thus allowing the driver to work with either setup without any firmware changes.
Still not following… Let’s say PA5 is connected to ground and checking that the pin is low (like E-switch). It reads low when the light is on, I get that part… but how does turning the off the light with the clicky switch break the PA5 to ground connection? The MCU will still be powered by C1, and thus PA5 will still read low being connected to ground. I’m obviously missing something here…
Hmm, it might need to be tested to make sure but seems to me that ground would be disconnected when the clicky was turned off.
The ground of the driver connects to the body of the light, then to the clicky switch and then to the ground of the battery. If you turn the switch off, then the ground path is broken correct?
Although I guess the cap would be draining back through the ground and could “power it”. You might be able to use a diode in the right place to stop that or some other option but that would take up more PCB space.
Although even if it didn’t improve the cap draining issue didn’t you still see much longer off times with the trigger pin over the ADC in prior tests?
Makes me wounder if with the large C2 caps we are using now if we can do away with C1 or make it really small, it would save PCB space as well.
I’m thinking that as long as C1 is powering the MCU, the + side of it is MCU+, the - side of it is MCU ground. The battery would be irrelevant as long as C1 is powering the MCU.
With the 85V I saw decent off time improvements with pin check over ADC, on the 84A I saw none. I haven’t yet tested with the 841 but am setting up a test as we speak.
I'll see if I can catch up on the rest. I've considered several of these things some at least, anyway, pin trigger isn't a "would", it's an is. bistro-HD using pin changes to trigger sleep, and it uses pin changes and watchdog timers to trigger wake, with the pin state used to verfiy on and break out of the sleep loop. It doesn't exactly require a divider actually, not for a 1S light. You can input a voltage a little higher than Vcc to a pin, not much. But if you don't have a divider then you need a bleeder. Also the divider helps me keep the on-voltage fairly close to threshold, so the cap doesn't need as far to fall. I could tighten that a bit more really. The cap still has to drain, at least until I understand these other things being discussed, but I don't see how you get around the cap draining and still have the cap wired correctly to protect things as its meant to. If the mcu or ldo aren't on the same hot and ground as the cap, then it's not a bypass cap anymore. Also it's not right to say most of the cap is used waiting for downtime. It depends on many factors, but in a really bad case maybe 25uF worth is (well, you can make it as high as you want). With low bleed resistance and on-powersaving, it can probably be as low as 1uF worth. I'd have to check, but I think the documented bistro setup eats 10uf with the implemented on-time powersaving. I kept the resistance high because I could, and it's better for moon mode drain.
Ok, one step of this at a time, I think some other claims to get around my response here maybe came up but I'll digest those after this.
The parasitic drain isn't needed for the voltage sense (either adc or logic level sense). You can just use high value resistors on the divider to solve that. No problem. The parasitic drain is needed to drain the bypass cap on the input to the diode. Until that cap is drained it's impossible to tell that voltage was shut-off. That cap provides a temporary power source, which is exactly what's it's supposed to do to eliminate input noise. How needed that really is, I'm not sure, but DEL tells us we need it. It's certainly normal and at a reasonable normal-practices sort of value for what it is.
In bistro-HD I use 4K on the divider. This keeps parasitic drain to 1mA, so 50% of the mcu's power draw when on even with powersaving. But, it means the input bypass takes a couple of ms to fall (I have more exact numbers but not at the moment). And that means the mcu is draining OTSM power for that time. It uses about 20% of the available charge during that wait, which is ok.
Ok, I think that got straightened out. I wasn't sure I wasn't missing something, but I didn't think I was. Yeah, only way to not deal with C1 is if it's not doing its job.
But TA, I don't know why you say using the ADC is easier. I'd say pin change is way easier. The ADC is getting used for two other purposes periodically, voltage check and temperature check, and constantly switching modes and restablizing it is a nuisance either with polling or with interrupts, and now you need it swtiching very fast to catch pin falls. I'm not even sure it's possible to stabilize it fast enough. I think the manual calls for a few ms when switching to and from the internal reference as the ADC reference, and that's too much. Again, pin change is set and forget. It's about 3 lines to configure including arming all interrupts, and checking the pin state on wake is just reading a register. It can't really get any simpler.
I meant it is easier from a PCB layout aspect, it reduces the number of traces you have to run. It should not be that hard to run a ground trace but still, every trace increases the chance of needing to use a via and every via reduces the usable pcb space on both sides ect.
As long as it works and it is done int he best overall method to give the widest margin of error possible then that is all that matters to me.
If it can do 7-10 seconds while cool then it should hopefully be able to maintain the 1-2 seconds we need even when hot and using cheap china components.
I still don't understand. You built these boards without any plan for pin change detection. And yet, I'm using pin change detection. There was no extra trace needed. Either way, best is to have a voltage divider going from C1 to pin7 to ground. Actually with pin change if you have a bleeder you don't need the resistor from pin 7 to ground, and even the resistor from C1 to pin 7 can just be a 0-ohm, but it's still better to use the divider. Maybe I'm missing conversation about an option 3, but if you have a driver than can do 2S adc (ie has a divider and not just vcc reads), you can do pin change detection with it.
TA, I have to say I'm a little surprised you haven't given HD a try yet on your board, from how you seemed eager to get this worked in. It's fine to talk and I certainly don't mind, but if you have one, it's maybe easier to see. I'm pretty sure from preferences you've shown that you'll end up wanting the timing resolution tweaks I'm planning, but that's not such a big deal. There's always plans for new stuff, but these work with this right now, or they do for me at least.
I’ve been fighting this for a while now but finally figured out (with a little help) that I needed an external pull down resistor in order to keep the power check from erratic readings with a floating pin on power off. This is what you referred to as a bleeder. I didn’t realize that with my previous tests on the 85 I had a pull down resistor as I was using the voltage monitoring input pin in my tests on the 85V. Thanks for clarifying.
Anyhow, some news. The 25 seconds I reported earlier was incorrect. My counting method was different and I have also noticed as the voltage gets close to the edge there can be sort of a run away effect on the timer, so with ADC every 0.125 seconds I’m still on 13 measurable seconds. However, with the pin check now sorted I am getting 22 measurable seconds. When I say measurable I mean that after powering back on I blinkout the interrupt cycles and multiply with the prescaler time. If it matches the time I clocked with a watch it’s accurately measured time.
EDIT: To clarify, I’m still testing on the 100uF cap.
I did find something interesting though. I doubled the WDT cycle time to 0.25 seconds, and also tried 1 second cycles, but it made no difference in measurable time what so ever. They both landed on about 22 seconds before reset or run away counter. So I tried the other way around and used the fastest WDT cycle at 16ms. This got me about 9 measurable seconds. So using more MCU power of coarse drains the cap, but only to a certain point, then it appears to be other factors that Flintrock has mentioned come in to play.
In terms of software I agree with Flintrock, pin check is easier than ADC, but if I want to do pin checking with my current driver design I would need an additional resistor for single cell, or two for multi cell… Unless someone has a better solution? I don’t know about using lower valued resistors on the voltage divider and using the same pin for pin check… Maybe it could work?
To be honest HD scares me, too many options and code to figure out with my limited time and I don’t look forward to sorting all that out and getting it to compile correctly and then work properly.
Plus like I said, I am out of the loop on exactly what needs to be done on the driver itself or anything for that matter.
Basically I don’t even know where to start to get HD to work. :student:
On top of that my time is really limited right now and I don’t have any spare drivers left to play with nor the funds to build anymore or even order the parts to convert to HD.
So it has been a combo os things that has kept me from trying it out. I really like the progress that has been made and every time I try to reveres modes using the OTC I tell myself I need to just figure it out but there are just not enough hours in the day or dollars in the wallet.
Are you doing power off detection by pin change interrupt and ADC voltage monitoring on the same pin? May I ask what resistor values you are using? The ones I have on my driver are too high at 12K and 3K, I can’t detect power on with pin check through them.